dmitrygr 10 months ago

Well, lack of REG+REG and REG+SHIFTED_REG addressing modes handicaps it significantly. And no, it will not get magically fused by magic fusing fairies in your cpu

  • kouteiheika 10 months ago

    > Well, lack of REG+REG and REG+SHIFTED_REG addressing modes handicaps it significantly.

    Does it? Well, there's a vendor specific extension for that (XTheadMemIdx):

    https://github.com/XUANTIE-RV/thead-extension-spec/releases/...

    Not sure about GCC, but on clang it is trivial to enable it. And if you really want to (assuming you have the hardware) you could compile exactly the same code with and without it and compare how much exactly it is handicapped if those instructions are not there.

    Plus, on RISC-V multiplication/division (about which you've complained) is optional, and there is also a variant of RISC-V with only 16 registers instead of 32 (also very simple to enable on recent versions of clang, although Linux would probably need some modifications to be able to run on that).

    So I'm not entirely convinced that RISC-V would be worse here.

    • dmitrygr 10 months ago

      Lack of mul/div isn’t actually good. Having it be done ins guest code is a magnitude slower than is host code.

      My other issue was that there is NO working Linux user space for rv32. There is for rv64. No Debian. No Ubuntu. No anything for rv32

  • snvzz 10 months ago

    >lack of REG+REG and REG+SHIFTED_REG addressing modes handicaps it significantly

    Is this a guess, or statistically supported on a body of empirical evidence like the RISC-V spec is?

    • dmitrygr 10 months ago

      Compile same code for aarch64 and riscv64. Compare.

      It is well known design deficiency. Much like lack of bit field ops.

      • camel-cdr 10 months ago

        Do you have code examples for this? I'm looking for cases where RISC-V is lacking compared to arm.

      • snvzz 10 months ago

        Sounds extremely subjective.

        i.e. it does not have my favored instructions or addressing modes, so it must be worse.