I'm suprised they can't ship (flat) packaging that could be used in Arizona with a simple assembly line.
If they had that packaging design then for this to make financial sense the two way shipping (and loading, unloading, custom clearance etc) would have to be less than shipping the packaging, the setup cost per unit cost of putting the chip in a box
You are correct. I was just illustrating what kind of processes belong to the umbrella term "packaging" in the context of semiconductor manufacturing. Was not talking about what particular process are missing from the Arizona facility.
But you are right on that it is CoWoS which is the missing ingredient.
You seem to be confusing the term packaging...it is not the box, it is how the chips are assembled together to make the final product.
Right, but he assumed he knew a technical term when he didn't, which is unwise.
Wait, wait. In the context of semiconductor manufacturing packaging does not mean what you think it means. It is not putting the product in a paper box.
It is about cutting the wafer into individual chips, wire bonding the silicone to pins, and covering the whole thing with epoxy.
Here is a video which explains it better: https://www.youtube.com/watch?v=7gg2eVVayA4
It would be indeed crazy if they would ship the ready chips to Taiwan just to be put in a paper box.
basically the input of the process is a wafer which looks like this: https://waferpro.com/wp-content/uploads/2016/08/Patterned-Lo...
And the output of the process is something which looks like this: https://res.cloudinary.com/rsc/image/upload/b_rgb:FFFFFF,c_p...