Comment by MBCook

Comment by MBCook 3 days ago

Right. It’s an accurate quote but that doesn’t mean it’s an accurate analysis.

Not only did they not seem to understand the possibilities in front of them, their chips were not well positioned at all to win. They were too hot and too power-hungry because Intel didn’t care much about efficiency at the time.

They were taking the “shrink a big chip” path. Apple, using ARM from Samsung then their own , ended up taking the “grow a little chip” path.

Which is a little bit ironic because Intel made their fortune on the “little” desktop processor that grew up to take over all the servers from main frames and the “big boy“ server chips like the SPARC and Alpha.

They became the big boys and history started repeating.

nxobject 3 days ago

I'm surprised they didn't learn the same lesson from the P4/NetBurst vs. Pentium M/Banias fiasco: the smaller but scalable architecture somehow always wins – first in power/perf, and then more generally.

(Actually, I need to check the timing of whether the "oh shit" moment for NetBurst happened before or after the development of the iPhone...)

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MBCook 3 days ago

The Core line (2006), when they started to swing back away from “make fast furnaces” was just one year before the iPhone (2007). So the NetBurst debacle had already happened.
But that was desktops. I wonder if they really realized how much a problem that was in mobile. I also think I remember a discussion of that quote from a few weeks ago where someone said the real problem for Intel in the iPhone wasn’t heat but power draw.
I don’t think they ever really got the religion. Apple’s M1 sort of seems like a repeat of this whole thing. Intel still didn’t get it at that point. Still too hot. Still not efficient enough.
The switch from NetBurst to Core seems more like a direction switch because they hit a wall, not a recognition of what the problem actually was. A change from ultra-fast single core to fast multi-core.

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- mjevans 3 days ago
  
  The NetBurst line also had a _terribly_ deep pipeline. I can't remember the number of stages offhand but it was _massive_ for the era in an attempt to keep growing the single core single state machine performance (more mhz). Pipeline stalls made for some very erratic and very power hungry bursts of performance and then rewound CPU state to take correct branch.
  
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