Comment by izacus
Comment by izacus 6 hours ago
I wonder if in 2025 a company would even allowed to start before being curb stomped by Intel's IP lawyers. After all, they started making clones, something that China gets accused of a lot.
Comment by izacus 6 hours ago
I wonder if in 2025 a company would even allowed to start before being curb stomped by Intel's IP lawyers. After all, they started making clones, something that China gets accused of a lot.
You can do it with HW accelerated emulation like Apple did with M1 CPUs. They implemented x86 compatible behavior in HW so the emulation has very good performance.
Another approach was Transmeta where the target ISA was microcoded, therefore done in "software".
There's a Linux patch that exposes it via prctl: https://lore.kernel.org/all/20240410211652.16640-1-zayd_qums...
There's also the CFINV instruction (architectural, part of FEAT_FLAGM), which helps with emulating the x86-64 CMP instruction.
Not instructions per se. Rosetta is a software based binary translator, and one of the most intensive parts about translating x86 to ARM is having to make sure all load/store instructions are strictly well ordered. To alleviate this pressure, Apple implemented the Total Store Ordering (TSO) feature in hardware, which makes sure that all ARM load and store instructions (transparently) follow the same memory ordering rules as x86.
It is funny to hear sometimes though:
"Apple created a chip which is not an X86! Its awesome! And the best thing about it is ... it does TSO does like an X86! Isn't that great?"
If the company was based in the EU, local regulation might encourage reverse-engineering.
See tangentially related topic from yesterday: https://news.ycombinator.com/item?id=46362927
Maybe if you find a company as small as Intel was at the time.
Intel customers required a second source supplier, i.e. IBM, thus, AMD was providing that for Intel in the beginning. Then later on AMD created the x86 64bit commands, which Intel adopted from AMD so now both share the same ISA.