Comment by bgnn
People think this is not relevant to real world problems but it actually is, albeit all the calculations aren't that relevant. Silicon substrate's resistance is basically an infinitely large grid of unut resistances at the distances relevant for a local point of an IC. Note that silicon substrate is often heavily doped (p-type) and all info you get from the fab is it's resistivity (often somewhere between 1 to 100 ohm per cm). For the most advanced tech nodes its often 10 ohm/cm. If you need to develop some intuition about noise coupling via the substrate you have to think that it's a grid instead of just calculating the resustance between point A and B. We need to distribute a grid of substrate contacts to collect the noisy currents too. So the grid shows up again!
My vague understanding of photolithography is that it's hard, though I didn't realise it's bad enough to evoke an egyptian goddess.
I'll see myself out.