Comment by ghaff
To this day, I don't know if Intel thought Itanium was the legitimately better approach. There were certainly theoretical arguments for VLIW over carrying CISC forward--even if it had never been commercially successful in the past. But I at least suspect that getting away from x86 licensing entanglements was also a factor. I suspect it was a bit of both and different people at the company probably had different perspectives.
Internal inertia is a powerful thing. This was discussed at length on comp.arch in the late 1990's early 2000's by insiders like Andy Glew. When OoO started to dominate intel should have realized the risk, but they continued to cancel internal projects to extend x86 to 64-bits. Of which apparently there were multiple. Even then, the day that AMD announced 64-bit extensions and a product timeline it should have resulted in intel doing an internal about face and acknowledging what everyone knew (in the late 1990's) and quietly scuttling ia64 while pulling a backup x86 out of their pocket. But since they had killed them all, they were forced to scramble to follow AMD.
Intel has plenty of engineering talent, if the bean counters, politicians and board would just get out of the way they would come back. But instead you see patently stupid/poor execution like then still ongoing avx512 saga. Lakefield, is a prime example of WTFism showing up publicly. The lack of internal leadership is written as loud as possible on a product where no one had the political power to force the smaller core to emulate avx512 during the development cycle, or NAK a product where the two cores couldn't even execute the same instructions. Its an engineering POC probably being shopped to apple or someone else considering an arm big.little without understanding how to actually implement it in a meaningful way. Compared with the AMD approach which seems to even best the arm big.little by simply using the same cores process optimized differently to the same effect without having to deal with the problems of optimizing software for two different microarch.