Comment by qiqitori 2 days ago
Speaking of interesting bits, this machine isn't actually an 8-bit computer, the CPU is 16-bit. (The video controller is 8-bit though, i.e. the VRAM data bus is 8-bits. It's also the same video controller used in various other machines, e.g. MSX.)
Much more influential 16-bit CPUs from that era include the PDP-11's CPU, the Data General Nova's CPU, the Xerox Alto's CPU, and arguably even the 8086 and 8088. The chronology seems to go as follows:
- 01965: IBM 1130
- 01966: HP 2116A, the first model of the HP 2100 series
- 01969: Nova
- 01970: PDP-11
- 01971: IBM System/7
- 01973: Alto (not shipped. NEVER shipped)
- 01973: TI-990 (the 990/3, according to https://cozx.com/dpitts/ti990.html)
- 01974: HP 3000
- 01974: PACE (which was from National Semiconductor, not National Instruments)
- 01975: CP1600
- 01976: TMS9900 (what the TI-99/4A used)
- 01976: Tandem (first Tandem/16 shipped to Citibank)
- 01978: 8086
- 01979: 8088
- 01981: TI-99/4A
Since there were plenty of 6-bit, 8-bit, 12-bit, 32-bit, 36-bit, 60-bit, and 64-bit CPUs in the 01950s, you'd think there would be some 16-bit CPUs then too, but I can't think of any. I'd even forgotten about the HP 2100 until I went looking just now.
Depends what you call '16-bit'. The addressable word size [1] for the PDP-11 was 8-bits and the problem space address space was 16-bits so a user program on the PDP-11 could ac cess 64kB of RAM, same as an Apple ][, except that multiple users could have their own address spaces.
The IBM 360 had 24-bit addresses, 8-bit words, and 16 32-bit registers.
8-bit words were thoroughly established by 1980s for general purpose computers, I think because of the use of 7/8-bit ASCII characters. I mean, you could pack ASCII characters into larger words in different ways but the most comfortable (portable) way to handle them is to have a char* which requires either 8-bit words or some way to address subwords.
The PDP-10 was probably the most loved heterodox architecture with a 20-bit address space and 36-bit words. It had pointers that could point to specific bits inside a word so it was possible to port C to it with char*'s. The user space was 256k words and 1152M bytes. (If an architecture like the PDP-10 let you access bits in the next word you could even point something like a char* at a variable sized UTF-8 char if you don't mind pointer arithmetic being limited to scans)
Some of the 8-bit micros had 16-bit registers such as the 8086/8088 and the 6809. The word size doesn't have to be related to the size of the data bus: the 8088 had an 8-bit data bus and the 8086 had a 16-bit data bus, it just pumped twice if it needed 16-bits. The 68k series had 32-bit registers and a 32-bit address space (like the DEC VAX which was the first modern computer) but had various bus sizes as low as 8-bits in the 68008.
With a cache the data bus could be larger than the word size.
Programming really isn't fun if you don't have index registers at least as large as the address space. There were numerous attempts to extend 8-bit architectures to a 24-bit address space that didn't provide large enough index registers, the 65816 is probably the most famous. The eZ80 on the other hand, extends the registers to 24-bits so it's easy to write programs that use the whole address space.
[1] which I'm just going to call word size
You are using "word size" to mean "memory addressing unit size", and while you are clear about this, its clash with common usage makes your comment somewhat confusing to read. But, doing the mental translations, I think everything you said is correct, even though much of it would be false if interpreted in accordance with the usual definitions.
Usually "word size" means "register size" and a "16-bit architecture" is one with a word size, in that sense, of 16 bits; that is, one whose architectural registers are 16 bits wide. That describes all the CPUs in my list, I think. The definition necessarily gets a bit ambiguous on machines with multiple register widths like the CDC 6600, the 8080, the 8086, and the 80386. But usually on this basis we say the 6600 was 60-bit (despite its smaller address registers), the 8080 was 8-bit (despite its 16-bit register-pair instructions) and so was the 6809, the 8086 was 16-bit (despite AH, AL, etc.) and so was the 65816, and the 386 and 360 and 68k and VAX were 32-bit.
I suspect that standardizing on 8-bit byte addressability was largely due to the influence of the 360, which didn't use ASCII. ASCII (a 7-bit code) was probably a significant influence, but it fit as nicely into 9-bit PDP-10 bytes as into 8-bit bytes, with space for a 512-character character set.
One minor quibble on the PDP-11: though addresses were 16 bits, as you probably know, later PDP-11 models supported split instruction and data spaces, with separate code and data segments. This doubled the memory available for a normal user program over what an Apple ][ could manage without bank switching. Later versions of PDP-11 Unix required this capability for some larger programs, though I don't remember which.
I think the status of the VAX as "the first modern computer" is pretty debatable. Other defensible candidates might be the IBM 801, the IBM PC, the SUN workstation, the Alto, Berkeley RISC I, Stretch, the CDC 6600, the IBM 360, the IBM 360 Model 91, the IBM 360 Model 67, and the Acorn Archimedes. But the VAX definitely has a plausible claim to that title.
I would add the Honeywell 316/516 series to the list. The 316 was the first 16-bit minicomputer, still using DTL logic. The 516 used TTL and served as the IMP 'router' in the early ARPANET. They were fairly popular before the PDP-11 took over with its brillant architecture.
Excellent point! I provided a little more detail on the 316 and 516 in my comment yesterday, https://news.ycombinator.com/item?id=43125358.
Famous 16-bit computer from the 1950s: https://en.wikipedia.org/wiki/Whirlwind_I
A interesting 12-bit microcontroller I just learned about is the "Toshiba Transistor Works" TLCS-12 for Ford's engine control module (1973). I'm trying to find a full datasheet for it:
https://www.shmj.or.jp/english/pdf/ic/exhibi739E.pdf
"Bits" is a stupid measure of "computer". The TI-99/4A clearly belongs in the 8-bit era of computers.
Motorola's 68000 was the single most prolific microprocessor of the 16-bit era. Yet all the registers are 32-bit, and all the instructions easily operate on 32-bit values [1]. About the only claim to being "16-bit" is the 16-bit wide data bus.
If we go by that metric, then the IBM PC (with its 8088 hobbled by an 8-bit data bus) is clearly just another 8-bit microcomputer.
BTW, this is absolutely the way that Motorola sees it. The 68008 is just a 68000 hobbled with an 8-bit data bus, and they label it as a 8/32-bit microprocessor.
[1] And if anyone dares to point out that the 68000's ALU is only 16-bits wide, then I have bad news about the Z-80: It only has a 4-bit ALU, so I guess it's actually a 4-bit microprocessor
The Amiga was loudly marketed as having a 32-bit CPU though (the Atari ST a lot less so, for whatever reason).
Having a 16-bit ALU in theory would make the 9900 a 16-bit processor as much as the 8086. The TI-99/4A is definitely weird (and slow!!) but it does fit the definition of a 16-bit system.
The ST very subtly so, even :)
> "ST" officially stands for "Sixteen/Thirty-two", referring to the Motorola 68000's 16-bit external bus and 32-bit internals.
Judging by the cycle counts, it's a 16 bit cpu internally? Word operations are almost always cheaper, even when there are no additional memory accesses for the long case. (I think long register to register moves are the only free long case. It's been a while, though.)
The '8-bit' micros all had a 16-bit address space, at least in their early implementations. (Later we got the eZ80, 65816, etc.) which lets you address 64k words of memory and the word was always 8-bit bytes.
Contrast that to the PDP-10 [1] which had a 36 bit word and a 20-bit address space and could access 256k words for a total of 1152 kilobytes.
The use of 8-bit bytes for characters I think killed off any word size other than 8-bit because otherwise it would be awkward to work with characters. [2] To be efficient you have to pack multiple characters into a word, it's something that comes up common enough you could create some special machine instructions for it, but if you want to support a C compiler you need a char. It's easiest if native pointers point to a byte. If it was otherwise you could make up a char that consists of a native pointer plus a pointer to the char inside the word, but boy what a hassle. [3]
Modern computers get many of the benefits of a larger word size (wider pipe to suck data through) by having a cache system that decouples the memory interface from the CPU, so a CPU could ask for 32 bits and get it retrieved 8 bits at a time, or it could ask for 32 bits and get the surrounding 128 bits stored in the cache so they don't need to be retrieved next)
[1] https://en.wikipedia.org/wiki/PDP-10
[2] DEC had a system of 6-bit characters, which divides nicely into 36, but you have the same problem
[3] That PDP-10 did have deep pointers that could point to a specific range of bits inside a word, that's what you need if you want something like that to be reasonable to program. I've been thinking about a fantasy computer to run inside Javascript and came across a 48-bit word size to use doubles efficiently to store words. That thing would have 24-bit address spaces, plus it would be possible to make 'deep pointers' that have 6 bits of offset and 6 bits of length (with the possibility of 0-length to point to a specific bit) and could be extended to 'wide pointers' by putting a few bits in front that would reference particular address spaces (might be video RAM, or a unit of memory protection, or made contiguous to represent a larger address space) I think I'd want enough to make a 1GB word address space so it could outdo a 32-bit machine and then let the rest be used for flags just to make it as baroque as possible... And that's why you only see 8-bit words today!
Well, I was gonna say this: A CPU is X bits if the highest number of bits that the value of a "load immediate" instruction can have is X. But I think this makes MIPS 16-bit.
Worse, that would mean Arm64 is a 12-bit CPU. The original 32-bit ARM encoding could only load 8 bit immediates, though later versions gained a 16-bit load immediate instruction.
RISC-V is a bit better off, as it has a special encoding for 20 bit immediates, while Alpha and PowerPC are the same as MIPS, stuck with 16-bit immediates.
> "Bits" is a stupid measure of "computer".
But that is the very way that they are defined through our historical understanding. The 990 platform, established in 1973, not the 80s, is 16-bit, with 16-bit words and 16-bit pointers.
Wait'll you discover that different CPUs use different word lengths, and not just your expected 8-bit X power-of-2 of current modern processors). 36-bit native word with a 9 bit databus and a 16-bit address bus with 64 kilowords of memory... welcome to the fun of early digital computing.
The other early 16-bit CPUs include:
National Instrument's PACE- I've never seen one used in anything: https://en.wikipedia.org/wiki/National_Semiconductor_PACE
but its bit-slice precursor, the IMP-16 was used in Aston Martin's Lagonda https://sprague.com/peter-sprague/aston-martin/
https://opposite-lock.com/topic/90934/lagonda-dashboards
General Instrument's CP1600, used in the Intellivision (a video game console yes, but there was a home computer keyboard attachment).
http://spatula-city.org/~im14u2c/chips/GICP1600.pdf
Its co-processor, the CP1640 is famous for evolving into Microchip's PIC microcontroller.