Comment by EncomLab
The miniscule amount of energy retained from the "reverse computation" will be absolutely demolished by the first DRAM refresh.
The miniscule amount of energy retained from the "reverse computation" will be absolutely demolished by the first DRAM refresh.
SRAM is actually very architecturally similar to some adiabatic circuit topologies.
I doubt it would use DRAM. Maybe some sort of MRAM/FeRAM would be a better fit. Or maybe a tiny amount of memory (e.g. Josephson junction) in a quantum circuit at some point in the future.