Comment by Szpadel

I had similar issue with my 3950x I had stability issues with 3600MT, so I optimized clicks instead (I loaded XMP profile and then changed clock to lower value before tightening clocks with memtest runs in between) What people often don't realize that dimm quality allows you to get lower absolute time before data is available for system. So when you lower clocks, you don't need to wait that many cycles for the data. In that case you might not get that much bandwidth that you would have originally, but you can get the same or similar latency also changing order of dimms on board can somehow alter how low you can get (I have 4 dimms and swapping 2 on the same channel improved significantly clocks that I was able to achieve - no idea why)