Comment by aleden
Are delay slots unique to mips? They're a pretty significant aspect (complication) that I don't see anywhere else.
Also, the gp register- don't know of any other arch where you need to set something like that up to access global variables. It's another layer of indirection which makes the assembly code harder to read (especially PIC code that works off of the value of the t9 register)
SPARC has delay slots. Here's some code. The clr %o3 and restore %o0 are in the delay slots.